- 2024
- Hung-Hsi Hsu, Tai-Hao Wen, Wei-Hsing Huang, Win-San Khwa, Yun-Chen Lo, Chuan-Jia Jhang, Yu-Hsiang Chin, Yu-Chiao Chen, Chung-Chuan Lo, Ren-Shuo Liu, Kea-Tiong Tang, Chih-Cheng Hsieh, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang:
A Nonvolatile AI-Edge Processor With SLC-MLC Hybrid ReRAM Compute-in-Memory Macro Using Current-Voltage-Hybrid Readout Scheme. IEEE J. Solid State Circuits 59(1): 116-127 (2024) - Wente Yi, Kefan Mo, Wenjia Wang, Yitong Zhou, Yejun Zeng, Zihan Yuan, Bojun Cheng, Biao Pan:
RDCIM: RISC-V Supported Full-Digital Computing-in-Memory Processor With High Energy Efficiency and Low Area Overhead. IEEE Trans. Circuits Syst. I Regul. Pap. 71(4): 1719-1732 (2024) - Jan Finkbeiner, Thomas Gmeinder, Mark Pupilli, Alexander Titterton, Emre Neftci:
Harnessing Manycore Processors with Distributed Memory for Accelerated Training of Sparse and Recurrent Models. AAAI 2024: 11996-12005 - Yipeng Wang, Mengtian Yang, Chieh-Pu Lo, Jaydeep P. Kulkarni:
30.6 Vecim: A 289.13GOPS/W RISC-V Vector Co-Processor with Compute-in-Memory Vector Register File for Efficient High-Performance Computing. ISSCC 2024: 492-494 - 2023
- Manuel Eggimann:
Near-Memory Computing Architectures and Circuits for Ultra-Low Power Near-Sensor Processors. ETH Zurich, Zürich, Switzerland, 2023 - Svetlana Kulagina, Henning Meyerhenke, Anne Benoit:
Mapping tree-shaped workflows on systems with different memory sizes and processor speeds. Concurr. Comput. Pract. Exp. 35(25) (2023) - João Fellipe Uller, João Vicente Souto, Pedro Henrique Penna, Márcio Castro, Henrique Cota de Freitas, Jean-François Méhaut:
LWMPI: An MPI library for NoC-based lightweight manycore processors with on-chip memory constraints. Concurr. Comput. Pract. Exp. 35(17) (2023) - Pratik Kumar, Ankita Nandi, Shantanu Chakrabartty, Chetan Singh Thakur:
Bias-Scalable Near-Memory CMOS Analog Processor for Machine Learning. IEEE J. Emerg. Sel. Topics Circuits Syst. 13(1): 312-322 (2023) - Ruiqi Guo, Zhiheng Yue, Xin Si, Hao Li, Te Hu, Limei Tang, Yabing Wang, Hao Sun, Leibo Liu, Meng-Fan Chang, Qiang Li, Shaojun Wei, Shouyi Yin:
TT@CIM: A Tensor-Train In-Memory-Computing Processor Using Bit-Level-Sparsity Optimization and Variable Precision Quantization. IEEE J. Solid State Circuits 58(3): 852-866 (2023) - Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Kwantae Kim, Hoi-Jun Yoo:
Neuro-CIM: ADC-Less Neuromorphic Computing-in-Memory Processor With Operation Gating/Stopping and Digital-Analog Networks. IEEE J. Solid State Circuits 58(10): 2931-2945 (2023) - Fengbin Tu, Yiqi Wang, Zihan Wu, Ling Liang, Yufei Ding, Bongjin Kim, Leibo Liu, Shaojun Wei, Yuan Xie, Shouyi Yin:
ReDCIM: Reconfigurable Digital Computing- In -Memory Processor With Unified FP/INT Pipeline for Cloud AI Acceleration. IEEE J. Solid State Circuits 58(1): 243-255 (2023) - Sriram Aananthakrishnan, Shamsul Abedin, Vincent Cavé, Fabio Checconi, Kristof Du Bois, Stijn Eyerman, Joshua B. Fryman, Wim Heirman, Jason Howard, Ibrahim Hur, Samkit Jain, Marek M. Landowski, Kevin Ma, Jarrod A. Nelson, Robert Pawlowski, Fabrizio Petrini, Sebastian Szkoda, Sanjaya Tayal, Jesmin Jahan Tithi, Yves Vandriessche:
The Intel Programmable and Integrated Unified Memory Architecture Graph Analytics Processor. IEEE Micro 43(5): 78-87 (2023) - Shivendra Singh Parihar, Simon Thomann, Girish Pahwa, Yogesh Singh Chauhan, Hussam Amrouch:
Cryogenic In-Memory Computing for Quantum Processors Using Commercial 5-nm FinFETs. IEEE Open J. Circuits Syst. 4: 258-270 (2023) - Xinfeng Xie, Peng Gu, Yufei Ding, Dimin Niu, Hongzhong Zheng, Yuan Xie:
MPU: Memory-centric SIMT Processor via In-DRAM Near-bank Computing. ACM Trans. Archit. Code Optim. 20(3): 40:1-40:26 (2023) - Joshua Klein, Irem Boybat, Yasir Mahmood Qureshi, Martino Dazzi, Alexandre Levisse, Giovanni Ansaloni, Marina Zapater, Abu Sebastian, David Atienza:
ALPINE: Analog In-Memory Acceleration With Tight Processor Integration for Deep Learning. IEEE Trans. Computers 72(7): 1985-1998 (2023) - Liang Chang, Siqi Yang, Zhiyuan Chang, Haodong Fan, Junlu Zhou, Jun Zhou:
TDPRO: Time-Domain-Based Computing-in Memory Engine for Ultra-Low Power ECG Processor. IEEE Trans. Circuits Syst. I Regul. Pap. 70(10): 3908-3919 (2023) - Leyi Chen, Cong Shi, Junxian He, Jianyi Yu, Haibing Wang, Jing Lu, Liyuan Liu, Nanjian Wu, Min Tian:
An 8-T Processing-in-Memory SRAM Cell-Based Pixel-Parallel Array Processor for Vision Chips. IEEE Trans. Circuits Syst. I Regul. Pap. 70(11): 4249-4259 (2023) - Hoichang Jeong, Seungbin Kim, Keonhee Park, Jueun Jung, Kyuho Jason Lee:
A Ternary Neural Network Computing-in-Memory Processor With 16T1C Bitcell Architecture. IEEE Trans. Circuits Syst. II Express Briefs 70(5): 1739-1743 (2023) - Yu Yao, Yukun Song, Ying Huang, Wei Ni, Duoli Zhang:
A Memory-Constraint-Aware List Scheduling Algorithm for Memory-Constraint Heterogeneous Muti-Processor System. IEEE Trans. Parallel Distributed Syst. 34(4): 1082-1099 (2023) - Yuchao Zhang, Zihao Xuan, Yi Kang:
A 28nm 15.09nJ/inference Neuromorphic Processor with SRAM-Based Charge Domain in-Memory-Computing. ASICON 2023: 1-4 - Peiyu Chen, Meng Wu, Yufei Ma, Le Ye, Ru Huang:
RIMAC: An Array-Level ADC/DAC-Free ReRAM-Based in-Memory DNN Processor with Analog Cache and Computation. ASP-DAC 2023: 228-233 - Yuncheng Lu, Xin Zhang, Zehao Li, Bo Wang, Tony Tae-Hyoung Kim:
SESOMP: A Scalable and Energy-Efficient Self-Organizing Map Processor with Computing-In-Memory and Dead Neuron Pruning. A-SSCC 2023: 1-3 - Soyeon Um, Sangjin Kim, Seongyon Hong, Sangyeob Kim, Hoi-Jun Yoo:
LOG-CIM: A 116.4 TOPS/W Digital Computing-In-Memory Processor Supporting a Wide Range of Logarithmic Quantization with Zero-Aware 6T Dual-WL Cell. A-SSCC 2023: 1-3 - Liang-Chi Chen, Chien-Chung Ho, Yuan-Hao Chang:
UpPipe: A Novel Pipeline Management on In-Memory Processors for RNA-seq Quantification. DAC 2023: 1-6 - Ashwin Sanjay Lele, Muya Chang, Samuel D. Spetalnick, Brian Crafton, Arijit Raychowdhury, Yan Fang:
Neuromorphic Swarm on RRAM Compute-in-Memory Processor for Solving QUBO Problem. DAC 2023: 1-6 - Samuel Riedel, Gua Hao Khov, Sergio Mazzola, Matheus A. Cavalcante, Renzo Andri, Luca Benini:
MemPool Meets Systolic: Flexible Systolic Computation in a Large Shared-Memory Processor Cluster. DATE 2023: 1-2 - Fengshi Tian, Xiaomeng Wang, Jinbo Chen, Jiakun Zheng, Hui Wu, Xuejiao Liu, Fengbin Tu, Jie Yang, Mohamad Sawan, Chi-Ying Tsui, Kwang-Ting (Tim) Cheng:
BIOS: A 40nm Bionic Sensor-defined 0.47pJ/SOP, 268.7TSOPs/W Configurable Spiking Neuron-in-Memory Processor for Wearable Healthcare. ESSCIRC 2023: 225-228 - Yipeng Wang, Mengtian Yang, Shanshan Xie, Meizhi Wang, Jaydeep P. Kulkarni:
CIMGN: An Energy-efficient All-digital Compute-in-memory Graph Neural Network Processor. ESSCIRC 2023: 477-480 - M. D. Arafat Kabir, Ehsan Kabir, Joshua Hollis, Eli Levy-Mackay, Atiyehsadat Panahi, Jason D. Bakos, Miaoqing Huang, David Andrews:
FPGA Processor In Memory Architectures (PIMs): Overlay or Overhaul ? FPL 2023: 109-115 - Samuel Riedel, Matheus A. Cavalcante, Manos Frouzakis, Domenic Wüthrich, Enis Mustafa, Arlind Billa, Luca Benini:
MinPool: A 16-core NUMA-L1 Memory RISC-V Processor Cluster for Always-on Image Processing in 65nm CMOS. ICECS 2023: 1-4